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1 LTC1624 features descriptio n u n n-channel mosfet drive n implements boost, step-down, sepic and inverting regulators n wide v in range: 3.5v to 36v operation n wide v out range: 1.19v to 30v in step-down configuration n 1% 1.19v reference n low dropout operation: 95% duty cycle n 200khz fixed frequency n low standby current n very high efficiency n remote output voltage sense n logic-controlled micropower shutdown n internal diode for bootstrapped gate drive n current mode operation for excellent line and load transient response n available in an 8-lead so package n notebook and palmtop computers, pdas n cellular telephones and wireless modems n battery-operated digital devices n dc power distribution systems n battery chargers typical applicatio n u the ltc ? 1624 is a current mode switching regulator controller that drives an external n-channel power mosfet using a fixed frequency architecture. it can be operated in all standard switching configurations including boost, step-down, inverting and sepic. burst mode tm operation provides high efficiency at low load currents. a maximum high duty cycle limit of 95% provides low dropout operation which extends operating time in battery-operated systems. the operating frequency is internally set to 200khz, allowing small inductor values and minimizing pc board space. the operating current level is user-programmable via an external current sense resistor. wide input supply range allows operation from 3.5v to 36v (absolute maximum). a multifunction pin (i th /run) allows external compensation for optimum load step response plus shutdown. soft start can also be implemented with the i th /run pin to properly sequence supplies. figure 1. high efficiency step-down converter + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 100pf c c 470pf r c 6.8k d1 mbrs340t3 c b 0.1 f r2 35.7k r1 20k c out 100 f 10v 2 m1 si4412dy l1 10 h r sense 0.05 c in 22 f 35v 2 v out 3.3v 2a v in 4.8v to 28v 1624 f01 , ltc and lt are registered trademarks of linear technology corporation. burst mode is a trademark of linear technology corporation. high efficiency so-8 n-channel switching regulator controller applicatio n s u
2 LTC1624 absolute m axi m u m ratings w ww u input supply voltage (v in )......................... 36v to C 0.3v topside driver supply voltage (boost)....42v to C 0.3v switch voltage (sw).................................. 36v to C 0.6v differential boost voltage (boost to sw) ....................................7.8v to C 0.3v sense C voltage v in < 15v .................................. (v in + 0.3v) to C 0.3v v in 3 15v .......................... (v in +0.3v) to (v in C 15v) i th /run, v fb voltages ............................ 2.7v to C 0.3v peak driver output current < 10 m s (tg) .................... 2a operating temperature range LTC1624cs ............................................ 0 c to 70 c LTC1624is ......................................... C 40 c to 85 c junction temperature (note 1)............................. 125 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c package/order i n for m atio n w u u order part number s8 part marking top view v in boost tg sw sense i th /run v fb gnd s8 package 8-lead plastic so 1 2 3 4 8 7 6 5 t jmax = 125 c, q ja = 110 c/ w LTC1624cs8 LTC1624is8 1624 1624i consult factory for military grade parts. electrical characteristics t a = 25 c, v in = 15v, unless otherwise noted. symbol parameter conditions min typ max units main control loop i in v fb feedback current (note 2) 10 50 na v fb feedback voltage (note 2) l 1.1781 1.19 1.2019 v d v line reg reference voltage line regulation v in = 3.6v to 20v (note 2) 0.002 0.01 %/v d v load reg output voltage load regulation (note 2) i th sinking 5 m a l 0.5 0.8 % i th sourcing 5 m a l C 0.5 C 0.8 % v ovl output overvoltage lockout 1.24 1.28 1.32 v i q input dc supply current (note 3) normal mode 550 900 m a shutdown v ith/run = 0v 16 30 m a v ith/run run threshold 0.6 0.8 v i ith/run run current source v ith/run = 0.3v C 0.8 C 2.5 C 5.0 m a run pullup current v ith/run = 1v C 50 C160 C 350 m a d v sense(max) maximum current sense threshold v fb = 1.0v 145 160 185 mv tg transition time tg t r rise time c load = 3000pf 50 150 ns tg t f fall time c load = 3000pf 50 150 ns f osc oscillator frequency l 175 200 225 khz v boost boost voltage sw = 0v, i boost = 5ma, v in = 8v 4.8 5.15 5.5 v d v boost boost load regulation sw = 0v, i boost = 2ma to 20ma 3 5 % t j = t a + (p d ? 110 c/w) note 2: the LTC1624 is tested in a feedback loop which servos v fb to the midpoint for the error amplifier (v ith = 1.8v). note 3: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see applications information. the l denotes specifications which apply over the full operating temperature range. LTC1624cs: 0 c t a 70 c LTC1624is: C 40 c t a 85 c note 1: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formula:
3 LTC1624 typical perfor m a n ce characteristics uw efficiency vs load current v out = 3.3v load current (a) efficiency (%) 100 95 90 85 80 75 70 0.001 0.1 1 10 1624 g08 0.01 v out = 5v v in = 10v r sense = 0.033 load current (a) efficiency (%) 100 95 90 85 80 75 70 0.001 0.1 1 10 1624 g07 0.01 v out = 3.3v r sense = 0.033 v in = 5v v in = 10v efficiency vs input voltage v out = 3.3v input voltage (v) 0 efficiency (%) 100 95 90 85 80 75 70 15 25 1624 g09 510 20 30 i load = 1a v out = 3.3v r sense = 0.033 i load = 0.1a efficiency vs load current v out = 5v efficiency vs input voltage v out = 5v input supply current vs input voltage boost line regulation input voltage (v) 0 boost voltage (v) 6 5 4 3 2 1 0 15 25 1624 g04 510 20 30 35 i boost = 1ma v sw = 0v boost load current (ma) 0 boost voltage (v) 6 5 4 3 2 1 0 15 25 1624 g06 510 20 30 v sw = 0v v in = 15v v in = 5v boost load regulation temperature ( c) ?0 boost voltage (v) 6.0 5.5 5.0 4.5 4.0 35 85 1624 g15 ?5 10 60 110 135 i load = 1ma load current (a) v in ?v out (v) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1624 g11 0 0.5 1.0 1.5 2.0 2.5 3.0 r sense = 0.033 v out drop of 5% input voltage (v) 0 supply current ( a) 700 600 500 400 300 200 100 0 15 25 1624 g05 510 20 30 35 sleep mode v fb = 1.21v shutdown input voltage (v) 0 efficiency (%) 100 95 90 85 80 75 70 15 25 1624 g10 510 20 30 i load = 1a v out = 5v r sense = 0.033 i load = 0.1a v in C v out dropout voltage vs load current boost voltage vs temperature
4 LTC1624 typical perfor m a n ce characteristics uw v i th /run (v) 1.2 0.8 2.4 0 0i out(max) i out (a) 1624 g01 i out(max) shutdown active mode v ith vs output current temperature ( c) ?0 i th /run pin source current with v ith = 1v ( a) i th /run pin source current with v ith = 0v ( a) 300 250 200 150 100 50 0 5 4 3 2 1 0 35 85 1624 g14 ?5 10 60 110 135 i th /run = 1v i th /run = 0v i th /run pin source current vs temperature i ith vs v ith i i th ( a) 200 150 50 0 3 v ith (v) 1.2 2.4 0.8 0 (b) 1624 g02 shutdown active mode frequency vs feedback voltage feedback voltage 0 frequency (khz) 250 200 150 100 50 0 1.00 1624 g03 0.25 0.50 0.75 1.25 temperature ( c) ?0 current sense threshold (mv) 170 168 166 164 162 160 158 156 154 152 150 10 60 85 1448 g13 ?5 35 110 135 maximum current sense threshold vs temperature temperature ( c) ?0 frequency (khz) 250 200 150 100 50 0 10 60 85 1448 g12 ?5 35 110 135 v out in regulation v fb = 0v pi n fu n ctio n s uuu sense C (pin 1): connects to the (C) input for the current comparator. built-in offsets between the sense C and v in pins in conjunction with r sense set the current trip thresh- olds. do not pull this pin more than 15v below v in or more than 0.3v below ground. i th /run (pin 2): combination of error amplifier compen- sation point and run control inputs. the current com- parator threshold increases with this control voltage. nominal voltage range for this pin is 1.19v to 2.4v. forcing this pin below 0.8v causes the device to be shut down. in shutdown all functions are disabled and tg pin is held low. v fb (pin 3): receives the feedback voltage from an exter- nal resistive divider across the output. gnd (pin 4): ground. connect to the (C) terminal of c out , the schottky diode and the (C) terminal of c in . sw (pin 5): switch node connection to inductor. in step- down applications the voltage swing at this pin is from a schottky diode (external) voltage drop below ground to v in . operating frequency vs temperature
5 LTC1624 tg (pin 6): high current gate drive for top n-channel mosfet. this is the output of a floating driver with a voltage swing equal to intv cc superimposed on the switch node voltage sw. boost (pin 7): supply to topside floating driver. the bootstrap capacitor c b is returned to this pin. voltage swing at this pin is from intv cc to v in + intv cc in step- down applications. in non step-down topologies the volt- age at this pin is constant and equal to intv cc if sw = 0v. v in (pin 8): main supply pin and the (+) input to the current comparator. must be closely decoupled to ground. pi n fu n ctio n s uuu (refer to functional diagram) operatio u main control loop the LTC1624 uses a constant frequency, current mode architecture. during normal operation, the top mosfet is turned on each cycle when the oscillator sets the rs latch and turned off when the main current comparator i 1 resets the rs latch. the peak inductor current at which i 1 resets the rs latch is controlled by the voltage on the i th /run pin, which is the output of error amplifier ea. the v fb pin, described in the pin functions, allows ea to receive an output feedback voltage from an external resistive divider. when the load current increases, it causes a slight decrease in v fb relative to the 1.19v reference, which in turn causes the i th /run voltage to increase until the average inductor current matches the new load current. while the top mosfet is off, the internal bottom mosfet is turned on for approximately 300ns to 400ns to recharge the bootstrap capacitor c b . the top mosfet driver is biased from the floating boot- strap capacitor c b that is recharged during each off cycle. the dropout detector counts the number of oscillator cycles that the top mosfet remains on and periodically forces a brief off period to allow c b to recharge. the main control loop is shut down by pulling the i th /run pin below its 1.19v clamp voltage. releasing i th /run allows an internal 2.5 m a current source to charge com- pensation capacitor c c . when the i th / run pin voltage reaches 0.8v the main control loop is enabled with the i th / run voltage pulled up by the error amp. soft start can be implemented by ramping the voltage on the i th /run pin from 1.19v to its 2.4v maximum (see applications infor- mation section). comparator ov guards against transient output over- shoots >7.5% by turning off the top mosfet and keeping it off until the fault is removed. low current operation the LTC1624 is capable of burst mode operation in which the external mosfet operates intermittently based on load demand. the transition to low current operation begins when comparator b detects when the i th /run voltage is below 1.5v. if the voltage across r sense does not exceed the offset of i 2 (approximately 20mv) for one full cycle, then on following cycles the top and internal bottom drives are disabled. this continues until the i th voltage exceeds 1.5v, which causes drive to be returned to the tg pin on the next cycle. intv cc power/boost supply power for the top and internal bottom mosfet drivers is derived from v in . an internal regulator supplies intv cc power. to power the top driver in step-down applications an internal high voltage diode recharges the bootstrap capacitor c b during each off cycle from the intv cc supply. a small internal n-channel mosfet pulls the switch node (sw) to ground each cycle after the top mosfet has turned off ensuring the bootstrap capacitor is kept fully charged.
6 LTC1624 fu n ctio n al diagra uu w (shown in a step-down application) + + + + + + + + i 2 i 1 8 4k 8k 4k v in 3 a run c b v out c out c in v in boost floating driver tg sw d1 l1 n-channel mosfet n-channel mosfet intv cc r sense sense d b 5.6v intv cc reg v in 0.8v 1.19v 200khz 200khz 1.19v i th /run 1.28v 1.19v 180k 1.5v 3 a 30k 8k 2 3 4 5 6 7 gnd 1624 fd 2.5 a slope comp slope comp st + b r s q ov osc drop- out det 1-shot 400ns switch logic intv cc v fb v fb r2 r1 r c c c c osc ea 1 g m = 1m 1.19v ref
7 LTC1624 applicatio n s i n for m atio n wu u u the LTC1624 can be used in a wide variety of switching regulator applications, the most common being the step- down converter. other switching regulator architectures include step-up, sepic and positive-to-negative converters. the basic LTC1624 step-down application circuit is shown in figure 1 on the first page. external component selection is driven by the load requirement and begins with the selection of r sense . once r sense is known, the inductor can be chosen. next, the power mosfet and d1 are selected. finally, c in and c out are selected. the circuit shown in figure 1 can be configured for operation up to an input voltage of 28v (limited by the external mosfets). step-down converter: r sense selection for output current r sense is chosen based on the required output current. the LTC1624 current comparator has a maximum thresh- old of 160mv/r sense . the current comparator threshold sets the peak of the inductor current, yielding a maximum average output current i max equal to the peak value less half the peak-to-peak ripple current, d i l . allowing a margin for variations in the LTC1624 and external component values yields: r mv i sense max = 100 the LTC1624 works well with values of r sense from 0.005 w to 0.5 w . step-down converter: inductor value calculation with the operating frequency fixed at 200khz smaller inductor values are favored. operating at higher frequen- cies generally results in lower efficiency because of mosfet gate charge losses. in addition to this basic trade-off, the effect of inductor value on ripple current and low current operation must also be considered. the inductor value has a direct effect on ripple current. the inductor ripple current d i l decreases with higher induc- tance and increases with higher v in or v out : d i vv fl vv vv l in out out d in d = - ()( ) + + ? ? ? ? where v d is the output schottky diode forward drop. accepting larger values of d i l allows the use of low inductances, but results in higher output voltage ripple and greater core losses. a reasonable starting point for setting ripple current is d i l = 0.4(i max ). remember, the maximum d i l occurs at the maximum input voltage. the inductor value also has an effect on low current operation. lower inductor values (higher d i l ) will cause burst mode operation to begin at higher load currents, which can cause a dip in efficiency in the upper range of low current operation. in burst mode operation lower inductance values will cause the burst frequency to decrease. in general, inductor values from 5 m h to 68 m h are typical depending on the maximum input voltage and output current. see also modifying burst mode operation section. step-down converter: inductor core selection once the value for l is known, the type of inductor must be selected. high efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or kool m m ? cores. actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. as inductance increases, core losses go down. unfortunately, increased inductance requires more turns of wire and, therefore, copper losses will increase. ferrite designs have very low core loss and are preferred at high switching frequencies, so design goals can con- centrate on copper loss and preventing saturation. ferrite core material saturates hard, which means that induc- tance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! molypermalloy (from magnetics, inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. a reasonable compromise from the same manu- facturer is kool m m . toroids are very space efficient, especially when you can use several layers of wire. because they generally lack a bobbin, mounting is more difficult. however, designs for surface mount that do not increase the height significantly are available. kool mu is a registered trademark of magnetics, inc.
8 LTC1624 step-down converter: power mosfet selection one external n-channel power mosfet must be selected for use with the LTC1624 for the top (main) switch. the peak-to-peak gate drive levels are set by the intv cc voltage. this voltage is typically 5v. consequently, logic level threshold mosfets must be used in most LTC1624 applications. if low input voltage operation is expected (v in < 5v) sublogic level threshold mosfets should be used. pay close attention to the bv dss specification for the mosfets as well; many of the logic level mosfets are limited to 30v or less. selection criteria for the power mosfet include the on resistance r ds(on) , reverse transfer capacitance c rss , input voltage and maximum output current. when the LTC1624 is operating in continuous mode the duty cycle for the top mosfet is given by: main v vv d in d switch duty cycle = v out + + the mosfet power dissipation at maximum output current is given by: p vv vv i kv i c f main out d in d max in max rss = + + () + () + () ( )( )() () 2 185 1 d r ds on . where d is the temperature dependency of r ds(on) and k is a constant inversely related to the gate drive current. mosfets have i 2 r losses, plus the p main equation includes an additional term for transition losses that are highest at high output voltages. for v in < 20v the high current efficiency generally improves with larger mosfets, while for v in > 20v the transition losses rapidly increase to the point that the use of a higher r ds(on) device with lower c rss actual provides higher efficiency. the diode losses are greatest at high input voltage or during a short circuit when the diode duty cycle is nearly 100%. the term (1+ d ) is generally given for a mosfet in the form of a normalized r ds(on) vs temperature curve, but d = 0.005/ c can be used as an approximation for low voltage mosfets. c rss is usually specified in the mosfet applicatio n s i n for m atio n wu u u characteristics. the constant k = 2.5 can be used to estimate the contributions of the two terms in the p main dissipation equation. step-down converter: output diode selection (d1) the schottky diode d1 shown in figure 1 conducts during the off-time. it is important to adequately specify the diode peak current and average power dissipation so as not to exceed the diode ratings. the most stressful condition for the output diode is under short circuit (v out = 0v). under this condition, the diode must safely handle i sc(pk) at close to 100% duty cycle. under normal load conditions, the average current con- ducted by the diode is simply: ii vv vv diode avg load avg in out in d () () ? ? ? ? ? = - + remember to keep lead lengths short and observe proper grounding (see board layout checklist) to avoid ringing and increased dissipation. the forward voltage drop allowable in the diode is calcu- lated from the maximum short-circuit current as: v p i vv v d d sc avg in d in ? + ? ? ? ? () where p d is the allowable diode power dissipation and will be determined by efficiency and/or thermal requirements (see efficiency considerations). step-down converter: c in and c out selection in continuous mode the source current of the top n-channel mosfet is a square wave of approximate duty cycle v out /v in . to prevent large voltage transients, a low esr input capacitor sized for the maximum rms current must be used. the maximum rms capacitor current is given by: ci vvv v in max out in out in required i rms ? - () [] 12 / this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is com-
9 LTC1624 applicatio n s i n for m atio n wu u u ratings that are ideal for input capacitor applications. consult the manufacturer for other specific recommend- ations. intv cc regulator an internal regulator produces the 5v supply that powers the drivers and internal circuitry within the LTC1624. good v in bypassing is necessary to supply the high transient currents required by the mosfet gate drivers. high input voltage applications in which large mosfets are being driven at high frequencies may cause the maxi- mum junction temperature rating for the LTC1624 to be exceeded. the supply current is dominated by the gate charge supply current as discussed in the efficiency considerations section. the junction temperature can be estimated by using the equations given in note 1 of the electrical characteristics table. for example, the LTC1624 is limited to less than 17ma from a 30v supply: t j = 70 c + (17ma)(30v)(110 c/w) = 126 c to prevent maximum junction temperature from being exceeded, the input supply current must be checked operating in continuous mode at maximum v in . step-down converter: topside mosfet driver supply (c b , d b ) an external bootstrap capacitor c b connected to the boost pin supplies the gate drive voltage for the topside mosfet. capacitor c b in the functional diagram is charged through internal diode d b from intv cc when the sw pin is low. when the topside mosfet is to be turned on, the driver places the c b voltage across the gate to source of the mosfet. this enhances the mosfet and turns on the topside switch. the switch node voltage sw rises to v in and the boost pin rises to v in + intv cc . the value of the boost capacitor c b needs to be 50 times greater than the total input capacitance of the topside mosfet. in most applications 0.1 m f is adequate. significant efficiency gains can be realized by supplying topside driver operating voltage from the output, since the v in current resulting from the driver and control currents will be scaled by a factor of (duty cycle)/(efficiency). for 5v regulators this simply means connecting the boost monly used for design because even significant deviations do not offer much relief. note that capacitor manufacturers ripple current ratings are often based on only 2000 hours of life. this makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. always consult the manufacturer if there is any question. the selection of c out is driven by the required effective series resistance (esr). typically, once the esr require- ment is satisfied the capacitance is adequate for filtering. the output ripple ( d v out ) is determined by: dd v i esr fc out l out ?+ ? ? ? ? 1 4 where f = operating frequency, c out = output capacitance and d i l = ripple current in the inductor. the output ripple is highest at maximum input voltage since d i l increases with input voltage. with d i l = 0.4i out(max) the output ripple will be less than 100mv at maximum v in , assuming: c out required esr < 2r sense manufacturers such as nichicon, united chemicon and sanyo should be considered for high performance through-hole capacitors. the os-con semiconductor dielectric capacitor available from sanyo has the lowest esr(size) product of any aluminum electrolytic at a some- what higher price. once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. in surface mount applications multiple capacitors may have to be paralleled to meet the esr or rms current handling requirements of the application. aluminum elec- trolytic and dry tantalum capacitors are both available in surface mount configurations. in the case of tantalum it is critical that the capacitors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. other capacitor types include sanyo os-con, nichicon wf series and sprague 595d series and the new ceramics. ceramic capacitors are now available in extremely low esr and high ripple current
10 LTC1624 pin through a small schottky diode (like a central cmdsh-3) to v out as shown in figure 10. however, for 3.3v and other lower voltage regulators, additional cir- cuitry is required to derive boost supply power from the output. for low input voltage operation (v in < 7v), a schottky diode can be connected from v in to boost to increase the external mosfet gate drive voltage. be careful not to exceed the maximum voltage on boost to sw pins of 7.8v. output voltage programming the output voltage is set by a resistive divider according to the following formula: vv r r out =+ ? ? ? ? 119 1 2 1 . the external resistive divider is connected to the output as shown in figure 2, allowing remote voltage sensing. when using remote sensing, a local 100 w resistor should be connected from l1 to r2 to prevent v out from running away if the sense lead is disconnected. applicatio n s i n for m atio n wu u u i th /run c c r c 1624 f03 d1 3.3v or 5v i th /run c c r c (a) (b) d1 c1 r1 i th /run c c r c (c) figure 3. i th / run pin interfacing soft start can be implemented by ramping the voltage on i th /run during start-up as shown in figure 3(c). as the voltage on i th/run ramps from 1.19v to 2.4v the internal peak current limit is also ramped at a proportional linear rate. the peak current limit begins at approximately 10mv/r sense (at v ith/run = 1.4v) and ends at: 160mv/r sense (v ith/run = 2.4v) the output current thus ramps up slowly, charging the output capacitor. the peak inductor current and maximum output current are as follows: i l(peak) = (v ith/run C 1.3v)/(6.8r sense ) i out(max) = i lpeak C d i l /2 with d i l = ripple current in the inductor. during normal operation the voltage on the i th /run pin will vary from 1.19v to 2.4v depending on the load current. pulling the i th /run pin below 0.8v puts the LTC1624 into a low quiescent current shutdown (i q < 30 m a). this pin can be driven directly from logic as shown in figures 3(a) and 3(b). efficiency considerations the percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine i th /run function the i th /run pin is a dual purpose pin that provides the loop compensation and a means to shut down the LTC1624. soft start can also be implemented with this pin. soft start reduces surge currents from v in by gradually increasing the internal current limit. power supply sequencing can also be accomplished using this pin. an internal 2.5 m a current source charges up the external capacitor c c. when the voltage on i th /run reaches 0.8v the LTC1624 begins operating. at this point the error amplifier pulls up the i th /run pin to its maximum of 2.4v (assuming v out is starting low). figure 2. setting the LTC1624 output voltage LTC1624 v fb gnd 100pf r2 l1 r1 v out 1624 f02
11 LTC1624 what is limiting the efficiency and which change would produce the most improvement. percent efficiency can be expressed as: %efficiency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percentage of input power. although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC1624 circuits: 1. LTC1624 v in current 2. i 2 r losses 3. topside mosfet transition losses 4. voltage drop of the schottky diode 1. the v in current is the sum of the dc supply current i q , given in the electrical characteristics table, and the mosfet driver and control currents. the mosfet driver current results from switching the gate capacitance of the power mosfet. each time a mosfet gate is switched from low to high to low again, a packet of charge dq moves from intv cc to ground. the resulting dq/dt is a current out of v in which is typically much larger than the control circuit current. in continuous mode, i gatechg = f (q t + q b ), where q t and q b are the gate charges of the topside and internal bottom side mosfets. by powering boost from an output-derived source (figure 10 application), the additional v in current resulting from the topside driver will be scaled by a factor of (duty cycle)/(efficiency). for example, in a 20v to 5v application, 5ma of intv cc current results in approximately 1.5ma of v in current. this reduces the midcurrent loss from 5% or more (if the driver was powered directly from v in ) to only a few percent. 2. i 2 r losses are predicted from the dc resistances of the mosfet, inductor and current shunt. in continuous mode the average output current flows through l but is chopped between the topside main mosfet/current shunt and the schottky diode. the resistances of the topside mosfet and r sense multiplied by the duty cycle can simply be summed with the resistance of l to obtain i 2 r losses. (power is dissipated in the sense resistor only when the topside mosfet is on. the i 2 r loss is thus reduced by the duty cycle.) for example, at 50% dc, if r ds(on) = 0.05 w , r l = 0.15 w and r sense = 0.05 w , then the effective total resistance is 0.2 w . this results in losses ranging from 2% to 8% for v out = 5v as the output current increases from 0.5a to 2a. i 2 r losses cause the efficiency to drop at high output currents. 3. transition losses apply only to the topside mosfet(s), and only when operating at high input voltages (typically 20v or greater). transition losses can be estimated from: transition loss = 2.5(v in ) 1.85 (i max )(c rss )(f) 4. the schottky diode is a major source of power loss at high currents and gets worse at high input voltages. the diode loss is calculated by multiplying the forward voltage drop times the diode duty cycle multiplied by the load current. for example, assuming a duty cycle of 50% with a schottky diode forward voltage drop of 0.5v, the loss is a relatively constant 5%. as expected, the i 2 r losses and schottky diode loss dominate at high load currents. other losses including c in and c out esr dissipative losses and inductor core losses generally account for less than 2% total additional loss. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in dc (resistive) load current. when a load step occurs, v out immediately shifts by an amount equal to ( d i load ? esr), where esr is the effective series resistance of c out . d i load also begins to charge or discharge c out which generates a feedback error signal. the regulator loop then acts to return v out to its steady-state value. during this recovery time v out can be monitored for overshoot or ringing that would indicate a stability problem. the i th external components shown in the figure 1 circuit will provide adequate compensation for most applications. a second, more severe transient, is caused by switching in loads with large (>1 m f) supply bypass capacitors. the discharged bypass capacitors are effectively put in parallel applicatio n s i n for m atio n wu u u
12 LTC1624 with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. the only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 ? c load ). thus a 10 m f capacitor would require a 250 m s rise time, limiting the charging current to about 200ma. automotive considerations: plugging into the cigarette lighter as battery-powered devices go mobile there is a natural interest in plugging into the cigarette lighter in order to conserve or even recharge battery packs during operation. but before you connect, be advised: you are plugging into the supply from hell. the main battery line in an automo- bile is the source of a number of nasty potential transients, including load dump, reverse battery and double battery. load dump is the result of a loose battery cable. when the cable breaks connection, the field collapse in the alternator can cause a positive spike as high as 60v which takes several hundred milliseconds to decay. reverse battery is just what it says, while double battery is a consequence of tow-truck operators finding that a 24v jump start cranks cold engines faster than 12v. the network shown in figure 4 is the most straightforward approach to protect a dc/dc converter from the ravages of an automotive battery line. the series diode prevents current from flowing during reverse battery, while the transient suppressor clamps the input voltage during load dump. note that the transient suppressor should not conduct during double battery operation, but must still clamp the input voltage below breakdown of the converter. although the LTC1624 has a maximum input voltage of applicatio n s i n for m atio n wu u u 36v, most applications will be limited to 30v by the mosfet bv dss . modifying burst mode operation the LTC1624 automatically enters burst mode operation at low output currents to boost efficiency. the point when continuous mode operation changes to burst mode op- eration scales as a function of maximum output current. the output current when burst mode operation com- mences is approximately 8mv/r sense (8% of maximum output current). with the additional circuitry shown in figure 5 the LTC1624 can be forced to stay in continuous mode longer at low output currents. since the LTC1624 is not a fully synchro- nous architecture, it will eventually start to skip cycles as the load current drops low enough. the point when the minimum on-time (450ns) is reached determines the load current when cycle skipping begins at approximately 1% of maximum output current. using the circuit in figure 5 the LTC1624 will begin to skip cycles but stays in regula- tion when i out is less than i out(min) : i tf l vv vv vv out min on min in out in d out d () () = ? ? ? ? ? ? - () + + ? ? ? ? 2 2 where t on(min) = 450ns, f = 200khz. the transistor q1 in the circuit of figure 5 operates as a current source developing an 18mv offset across the + + 1000pf 100 18mv r* c out l1 r sense c in v out d1 mbrs340t3 q1 2n2222 v in 1624 f05 (v out ?0.7v) 180 a *r = v in LTC1624 sense tg sw + figure 5. modifying burst mode operation figure 4. plugging into the cigarette lighter LTC1624 v in 50a i pk rating 12v transient voltage suppressor general instrument 1.5ka24a 1624 f04
13 LTC1624 100 w resistor in series with the sense C pin. this offset cancels the internal offset in current comparator i 2 (refer to functional diagram). this comparator in conjunction with the voltage on the i th /run pin determines when to enter into burst mode operation (refer to low current operation in operation section). with the additional exter- nal offset present, the drive to the topside mosfet is always enabled every cycle and constant frequency opera- tion occurs for i out > i out(min) . step-down converter: design example as a design example, assume v in = 12v(nominal), v in = 22v(max), v out = 3.3v and i max = 2a. r sense can immediately be calculated: r sense = 100mv/2a = 0.05 w assume a 10 m h inductor. to check the actual value of the ripple current the following equation is used: d i vv fl vv vv l in out out d in d = - ()( ) + + ? ? ? ? the highest value of the ripple current occurs at the maximum input voltage: d i vv khz h vv vv l = - () + + ? ? ? ? = 22 3 3 200 10 33 05 22 0 5 158 ... . . m a p-p the power dissipation on the topside mosfet can be easily estimated. choosing a siliconix si4412dy results in: r ds(on) = 0.042 w , c rss = 100pf. at maximum input voltage with t(estimated) = 50 c: p vv vv acc v a pf khz mw main = + + () + () - () [] () + ()()( )( ) = 33 05 22 0 5 2 1 0 005 50 25 0 042 2 5 22 2 100 200 62 2 185 .. . .. . . w the most stringent requirement for the schottky diode occurs when v out = 0v (i.e. short circuit) at maximum v in . in this case the worst-case dissipation rises to: pi v v vv d sc avg d in in d = () + ? ? ? ? () applicatio n s i n for m atio n wu u u with the 0.05 w sense resistor i sc(avg) = 2a will result, increasing the 0.5v schottky diode dissipation to 0.98w. c in is chosen for an rms current rating of at least 1.0a at temperature. c out is chosen with an esr of 0.03 w for low output ripple. the output ripple in continuous mode will be highest at the maximum input voltage. the output voltage ripple due to esr is approximately: v oripple = r esr ( d i l ) = 0.03 w (1.58a p-p ) = 47mv p-p step-down converter: duty cycle limitations at high input to output differential voltages the on-time gets very small. due to internal gate delays and response times of the internal circuitry the minimum recommended on-time is 450ns. since the LTC1624s frequency is inter- nally set to 200khz a potential duty cycle limitation exists. when the duty cycle is less than 9%, cycle skipping may occur which increases the inductor ripple current but does not cause v out to lose regulation. avoiding cycle skipping imposes a limit on the input voltage for a given output voltage only when v out < 2.2v using 30v mosfets. (remember not to exceed the absolute maximum voltage of 36v.) v in(max) = 11.1v out + 5v for dc > 9% boost converter applications the LTC1624 is also well-suited to boost converter appli- cations. a boost converter steps up the input voltage to a higher voltage as shown in figure 6. figure 6. boost converter + c b l1 m1 r2 r1 r sense c in d1 v in 1624 f06 v in v fb LTC1624 sense boost tg sw gnd + c out v out
14 LTC1624 boost converters: power mosfet selection one external n-channel power mosfet must be selected for use with the LTC1624 for the switch. in boost applica- tions the source of the power mosfet is grounded along with the sw pin. the peak-to-peak gate drive levels are set by the intv cc voltage. the gate drive voltage is equal to approximately 5v for v in > 5.6v and a logic level mosfet can be used. at v in voltages below 5v the gate drive voltage is equal to v in C 0.6v and a sublogic level mosfet should be used. selection criteria for the power mosfet include the on resistance r ds(on) , reverse transfer capacitance c rss , input voltage and maximum output current. when the LTC1624 is operating in continuous mode the duty cycle for the mosfet is given by: main switch duty cycle = 1 - + v vv in out d the mosfet power dissipation at maximum output cur- rent is given by: applicatio n s i n for m atio n wu u u boost converter: inductor selection for most applications the inductor will fall in the range of 10 m h to 100 m h. higher values reduce the input ripple voltage and reduce core loss. lower inductor values are chosen to reduce physical size. the input current of the boost converter is calculated at full load current. peak inductor current can be significantly higher than output current, especially with smaller induc- tors and lighter loads. the following formula assumes continuous mode operation and calculates maximum peak inductor current at minimum v in : ii v v i l peak out max out in min l max () () () () = ? ? ? ? ? + d 2 the ripple current in the inductor ( d i l ) is typically 20% to 30% of the peak inductor current occuring at v in(min) and i out(max) . d i vv v v khz l v v l in out d in out d p-p () = +- () ()() + () 200 with d i l(max) = d i l(p-p) at v in = v in(min) . remember boost converters are not short-circuit pro- tected, and that under output short conditions, inductor current is limited only by the available current of the input supply, i out(overload) . specify the maximum inductor current to safely handle the greater of i l(peak) or i out(overload) . make sure the inductors saturation cur- rent rating (current when inductance begins to fall) exceeds the maximum current rating set by r sense . boost converter: r sense selection for maximum output current r sense is chosen based on the required output current. remember the LTC1624 current comparator has a maxi- mum threshold of 160mv/r sense . the current compara- tor threshold sets the peak of the inductor current, yielding a maximum average output current i out(max) equal to i l(peak) less half the peak-to-peak ripple current ( d i l ), divided by the output-input voltage ratio (see equation for i l(peak) ) . pi v vv r k v i c khz where i i vv v main in max in min out d ds on out in max rss in max out max out d in min = ? ? ? - + ? ? ? ? ? + () + () ? ? ? ()( ) = + ? ? ? ? ? () () () () () () () 2 185 11 200 d . d is the temperature dependency of r ds(on) and k is a constant inversely related to the gate drive current. mosfets have i 2 r losses, plus the p main equation includes an additional term for transition losses that are highest at high output voltages. for v out < 20v the high current efficiency generally improves with larger mosfets, while for v out > 20v the transition losses rapidly increase to the point that the use of a higher r ds(on) device with lower c rss actual provides higher efficiency. for addi- tional information refer to step-down converter: power mosfet selection in the applications information section.
15 LTC1624 allowing a margin for variations in the LTC1624 (without considering variation in r sense ), assuming 30% ripple current in the inductor, yields: r mv i v vv sense out max in min out d = + ? ? ? ? ? () () 100 boost converter: output diode the output diode conducts current only during the switch off-time. peak reverse voltage for boost converters is equal to the regulator output voltage. average forward current in normal operation is equal to output current. remember boost converters are not short-circuit pro- tected. check to be sure the diodes current rating exceeds the maximum current set by r sense . schottky diodes such as motorola mbr130lt3 are recommended. boost converter: output capacitors the output capacitor is normally chosen by its effective series resistance (esr), because this is what determines output ripple voltage. since the output capacitors esr affects efficiency, use low esr capacitors for best performance. boost regula- tors have large rms ripple current in the output capacitor that must be rated to handle the current. the output capacitor ripple current (rms) is: ci vv v out out out in in i ripple rms () ? - output ripple is then simply: v out = r esr ( d i l(rms) ). boost converter: input capacitors the input capacitor of a boost converter is less critical due to the fact that the input current waveform is triangular, and does not contain large square wave currents as found in the output capacitor. the input voltage source imped- ance determines the size of the capacitor that is typically 10 m f to 100 m f. a low esr is recommended although not as critical as the output capacitor and can be on the order of 0.3 w . input capacitor ripple current for the LTC1624 used as a boost converter is: applicatio n s i n for m atio n wu u u c vv v khz l v in in out in out i ripple ? () - () ()()() 03 200 . the input capacitor can see a very high surge current when a battery is suddenly connected and solid tantalum capaci- tors can fail under this condition. be sure to specify surge tested capacitors. boost converter: duty cycle limitations the minimum on-time of 450ns sets a limit on how close v in can approach v out without the output voltage over- shooting and tripping the overvoltage comparator. unless very low values of inductances are used, this should never be a problem. the maximum input voltage in continuous mode is: v in(max) = 0.91v out + 0.5v for dc = 9% sepic converter applications the LTC1624 is also well-suited to sepic (single ended primary inductance converter) converter applications. the sepic converter shown in figure 7 uses two induc- tors. the advantage of the sepic converter is the input voltage may be higher or lower than the output voltage. the first inductor l1 together with the main n-channel mosfet switch resemble a boost converter. the second inductor l2 and output diode d1 resemble a flyback or buck-boost converter. the two inductors l1 and l2 can be independent but also can be wound on the same core since figure 7. sepic converter + + c b l1 l2 m1 r2 r1 r sense c in d1 c1 v in 1624 f07 v in v fb LTC1624 sense boost tg sw gnd + c out v out
16 LTC1624 applicatio n s i n for m atio n wu u u identical voltages are applied to l1 and l2 throughout the switching cycle. by making l1 = l2 and wound on the same core the input ripple is reduced along with cost and size. all sepic applications information that follows assumes l1 = l2 = l. sepic converter: power mosfet selection one external n-channel power mosfet must be selected for use with the LTC1624 for the switch. as in boost applications the source of the power mosfet is grounded along with the sw pin. the peak-to-peak gate drive levels are set by the intv cc voltage. this voltage is equal to approximately 5v for v in > 5.6v and a logic level mosfet can be used. at v in voltages below 5v the intv cc voltage is equal to v in C 0.6v and a sublogic level mosfet should be used. selection criteria for the power mosfet include the on resistance r ds(on) , reverse transfer capacitance c rss , input voltage and maximum output current. when the LTC1624 is operating in continuous mode the duty cycle for the mosfet is given by: main switch duty cycle = vv vv v out d in out d + ++ the mosfet power dissipation and maximum switch current at maximum output current are given by: p i vv vvv r k v v i c khz where i i vv v main sw max out d in min out d ds on in min out sw max rss sw max out max out d in min = ? ? ? + ++ ? ? ? ? ? + () + + ? ? ? ? ? ? ()( ) = + + ? ? ? ? ? () () () () ( ) () () () 2 185 1 200 1 d . d is the temperature dependency of r ds(on) and k is a constant inversely related to the gate drive current. the peak switch current is i sw(max) + d i l . mosfets have i 2 r losses plus the p main equation includes an additional term for transition losses that are highest at high total input plus output voltages. for (v in + v out ) < 20v the high current efficiency generally improves with larger mosfets, while for (v in + v out ) > 20v the transition losses rapidly increase to the point that the use of a higher r ds(on) device with lower c rss actual provides higher efficiency. for additional information refer to the step-down converter: power mosfet selection in the applications information section. sepic converter: inductor selection for most applications the equal inductor values will fall in the range of 10 m h to 100 m h. higher values reduce the input ripple voltage and reduce core loss. lower inductor values are chosen to reduce physical size and improve transient response. like the boost converter the input current of the sepic converter is calculated at full load current. peak inductor current can be significantly higher than output current, especially with smaller inductors and lighter loads. the following formula assumes continuous mode operation and calculates maximum peak inductor current at mini- mum v in : i i l1 peak l2 peak () () () () () () () = ? ? ? ? ? + = + ? ? ? ? ? + i v v i i vv v i out max out in min l out max in min d in min l d d 1 2 2 2 the ripple current in the inductor ( d i l ) is typically 20% to 30% of the peak current occuring at v in(min) and i out(max) , and d i l1 = d i l2 . maximum d i l occurs at maximum v in . d i vv v khz l v v v l in out d in out d p-p () = () + () ()() ++ () 200 by making l1 = l2 and wound on the same core the value of inductance in all the above equations are replaced by 2l due to their mutual inductance. doing this maintains the same ripple current and inductive energy storage in the inductors. for example a coiltronix ctx10-4 is a 10 m h inductor with two windings. with the windings in parallel
17 LTC1624 10 m h inductance is obtained with a current rating of 4a. splitting the two windings creates two 10 m h inductors with a current rating of 2a each. therefore substitute (2)(10 m h) = 20 m h for l in the equations. specify the maximum inductor current to safely handle i l(peak) . make sure the inductors saturation current rat- ing (current when inductance begins to fall) exceeds the maximum current rating set by r sense . sepic converter: r sense selection for maximum output current r sense is chosen based on the required output current. remember the LTC1624 current comparator has a maxi- mum threshold of 160mv/r sense . the current compara- tor threshold sets the peak of the inductor current, yielding a maximum average output current i out(max) equal to i l1(peak) less half the peak-to-peak ripple current, d i l , divided by the output-input voltage ratio (see equation for i l1(peak) ) . allowing a margin for variations in the LTC1624 (without considering variation in r sense ), assuming 30% ripple current in the inductor, yields: r mv i v vv sense out max in min out d = + ? ? ? ? ? () () 100 sepic converter: output diode the output diode conducts current only during the switch off-time. peak reverse voltage for sepic converters is equal to v out + v in . average forward current in normal operation is equal to output current. peak current is: ii vv v i d peak out max out d in min l 1 1 () () () = + + ? ? ? ? ? +d schottky diodes such as mbr130lt3 are recommended. sepic converter: input and output capacitors the output capacitor is normally chosen by its effective series resistance (esr), because this is what determines applicatio n s i n for m atio n wu u u output ripple voltage. the input capacitor needs to be sized to handle the ripple current safely. since the output capacitors esr affects efficiency, use low esr capacitors for best performance. sepic regula- tors, like step-down regulators, have a triangular current waveform but have maximum ripple at v in(max) . the input capacitor ripple current is: i i ripple rms l () = d 12 the output capacitor ripple current is: ii ripple rms out v v out in () = the output capacitor ripple voltage (rms) is: v out(ripple) = 2( d i l )(esr) the input capacitor can see a very high surge current when a battery is suddenly connected, and solid tantalum capacitors can fail under this condition. be sure to specify surge tested capacitors. sepic converter: coupling capacitor (c1) the coupling capacitor c1 in figure 7 sees a nearly rectangular current waveform. during the off-time the current through c1 is i out (v out /v in ) while approximately Ci out flows though c1 during the on-time. this current waveform creates a triangular ripple voltage on c1: d v i khz c v vv v c out out in out d 1 200 1 = ()() ? ? ? ? ? ++ ? ? ? ? the maximum voltage on c1 is then: v c1(max) = v in + d v c1 /2 (typically close to v in(max) ). the ripple current though c1 is: ii v v ripple c out out in 1 () = the maximum ripple current occurs at i out(max) and v in(min) . the capacitance of c1 should be large enough so
18 LTC1624 applicatio n s i n for m atio n wu u u positive-to-negative converter: output voltage programming setting the output voltage for a positive-to-negative con- verter is different from other architectures since the feed- back voltage is referenced to the LTC1624 ground pin and the ground pin is referenced to C v out . the output voltage is set by a resistive divider according to the following formula: vv r r v dc dc out in =+ ? ? ? ? ?- - ? ? ? ? 119 1 1 21 . the external resistive divider is connected to the output as shown in figure 8. positive-to-negative converter: power mosfet selection one external n-channel power mosfet must be selected for use with the LTC1624 for the switch. as in step-down applications the source of the power mosfet is con- nected to the schottky diode and inductor. the peak-to- peak gate drive levels are set by the intv cc voltage. the gate drive voltage is equal to approximately 5v for v in > 5.6v and a logic level mosfet can be used. at v in voltages below 5v the intv cc voltage is equal to v in C 0.6v and a sublogic level mosfet should be used. selection criteria for the power mosfet include the on resistance r ds(on) , reverse transfer capacitance c rss , input voltage and maximum output current. when the LTC1624 is operating in continuous mode the duty cycle for the mosfet is given by: main v vv d out d switch duty cycle = v v out in + ++ with ? v out ? being the absolute value of v out . the mosfet power dissipation and maximum switch current are given by: that the voltage across c1 is constant such that v c1 = v in at full load over the entire v in range. assuming the enegry storage in the coupling capacitor c1 must be equal to the enegry stored in l1, the minimum capacitance of c1 is: c li v v min out out in min 1 1 22 4 () () = ()( ) sepic converter: duty cycle limitations the minimum on-time of 450ns sets a limit on how high an input-to-output ratio can be tolerated while not skip- ping cycles. this only impacts designs when very low output voltages (v out < 2.5v) are needed. note that a sepic converter would not be appropriate at these low output voltages. the maximum input voltage is (remem- ber not to exceed the absolute maximum limit of 36v): v in(max) = 10.1v out + 5v for dc > 9% positive-to-negative converter applications the LTC1624 can also be used as a positive-to-negative converter with a grounded inductor shown in figure 8. since the LTC1624 requires a positive feedback signal relative to device ground, pin 4 must be tied to the regulated negative output. a resistive divider from the negative output to ground sets the output voltage. remember not to exceed maximum v in ratings v in + ? v out ? 36v. p main = i sw max i out max i + d r ds on + k v in max + v out 1.85 c rss 200khz () () () ( ) () ()( ) () { { figure 8. positive-to-negative converter + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 8 7 6 5 1 2 3 4 100pf c c r c d1 c b r1 r2 c out m1 l1 r sense c in ? out v in 1624 f08
19 LTC1624 where i vv v v out max in out d in : i sw max () () = ++ ? ? ? ? ? d is the temperature dependency of r ds(on) and k is a constant inversely related to the gate drive current. the maximum switch current occurs at v in(min) and the peak switch current is i sw(max) + d i l /2. the maximum voltage across the switch is v in(max) + ? v out ? . mosfets have i 2 r losses plus the p main equation includes an additional term for transition losses that are highest at high total input plus output voltages. for ( ? v out ? + v in ) < 20v the high current efficiency generally improves with larger mosfets, while for ( ? v out ? + v in ) > 20v the transition losses rapidly increase to the point that the use of a higher r ds(on) device with lower c rss actual provides higher efficiency. for additional informa- tion refer to the step-down converter: power mosfet selection in the applications information section. positive-to-negative converter: inductor selection for most applications the inductor will fall in the range of 10 m h to 100 m h. higher values reduce the input and output ripple voltage (although not as much as step-down con- verters) and also reduce core loss. lower inductor values are chosen to reduce physical size and improve transient response but do increase output ripple. like the boost converter, the input current of the positive- to-negative converter is calculated at full load current. peak inductor current can be significantly higher than output current, especially with smaller inductors (with high d i l values). the following formula assumes continu- ous mode operation and calculates maximum peak induc- tor current at minimum v in : ii vv v v i l peak out max in out d in l () () = ++ ? ? ? ? ? + d 2 the ripple current in the inductor ( d i l ) is typically 20% to 50% of the peak inductor current occuring at v in(min) and i out(max) to minimize output ripple. maximum d i l occurs at minimum v in . applicatio n s i n for m atio n wu u u d i vv v khz l v v v l in out d in out d p-p () = () + () ()() ++ () 200 specify the maximum inductor current to safely handle i l(peak) . make sure the inductors saturation current rat- ing (current when inductance begins to fall) exceeds the maximum current rating set by r sense . positive-to-negative converter: r sense selection for maximum output current r sense is chosen based on the required output current. remember the LTC1624 current comparator has a maxi- mum threshold of 160mv/r sense . the current compara- tor threshold sets the peak of the inductor current, yielding a maximum average output current i out(max) equal to i l(peak) less half the peak-to-peak ripple current with the remainder divided by the duty cycle. allowing a margin for variations in the LTC1624 (without considering variation in r sense ) and assuming 30% ripple current in the inductor, yields: r mv i v vvv sense out max in min in min out d = ++ ? ? ? ? ? () () () 100 positive-to-negative converter: output diode the output diode conducts current only during the switch off-time. peak reverse voltage for positive-to-negative converters is equal to ? v out ? + v in . average forward current in normal operation is equal to i d(peak) C d i l /2. peak diode current (occurring at v in(min) ) is: ii vv v i d peak out max out d in l () () = + () + ? ? ? ? ? + 1 2 d positive-to-negative converter: input and output capacitors the output capacitor is normally chosen by its effective series resistance (esr), because this is what determines output ripple voltage. both input and output capacitors need to be sized to handle the ripple current safely.
20 LTC1624 positive-to-negative converters have high ripple current in both the input and output capacitors. for long capacitor lifetime, the rms value of this current must be less than the high frequency ripple rating of the capacitor. the following formula gives an approximate value for rms ripple current. this formula assumes continuous mode and low current ripple. small inductors will give somewhat higher ripple current, especially in discontinuous mode. for the exact formulas refer to application note 44, pages 28 to 30. the input and output capacitor ripple current (occurring at v in(min) ) is: capacitor ff i v v out out in i rms = ()( ) ff = fudge factor (1.2 to 2.0) the output peak-to-peak ripple voltage is: v out(p-p) = r esr (i d(max) ) the input capacitor can also see a very high surge current when a battery is suddenly connected, and solid tantalum capacitors can fail under this condition. be sure to specify surge tested capacitors. positive-to-negative converter: duty cycle limitations the minimum on-time of 450ns sets a limit on how high of input-to-output ratio can be tolerated while not skipping cycles. this only impacts designs when very low output voltages ( ? v out ? < 2.5v) are needed. the maximum input voltage is: v in(max) < 10.1v out + 5v for dc > 9% v in(max) < 36v C ? v out ? for absolute maximum ratings positive-to-negative converter: shutdown considerations since the ground pin on the LTC1624 is referenced to Cv out , additional circuitry is needed to put the LTC1624 into shutdown. shutdown is enabled by pulling the i th /run pin below 0.8v relative to the LTC1624 ground pin. with the LTC1624 ground pin referenced to C v out , the nonimal range on the i th /run pin is C v out (in shutdown) to (C v out + 2.4v)(at max i out ). referring to figure 15, m2, m3 and r3 provide a level shift from typical ttl levels to the LTC1624 operating as positive-to-nega- tive converter. mosfet m3 supplies gate drive to m2 during shutdown, while m2 pulls the i th/run pin voltage to Cv out , shutting down the LTC1624. step-down converters: pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1624. these items are also illustrated graphically in the layout diagram of figure 9. check the following in your layout: 1. are the signal and power grounds segregated? the LTC1624 ground (pin 4) must return to the (C) plate of c out. 2. does the v fb (pin 3) connect directly to the feedback resistors? the resistive divider r1, r2 must be con- nected between the (+) plate of c out and signal ground. the 100pf capacitor should be as close as possible to the LTC1624. 3. does the v in lead connect to the input voltage at the same point as r sense and are the sense C and v in leads routed together with minimum pc trace spacing? the filter capacitor between v in and sense C should be as close as possible to the LTC1624. 4. does the (+) plate of c in connect to r sense as closely as possible? this capacitor provides the ac current to the mosfet(s). also, does c in connect as close as possible to the v in and ground pin of the LTC1624? this capacitor also supplies the energy required to recharge the bootstrap capacitor. adequate input decoupling is critical for proper operation. 5. keep the switch node sw away from sensitive small- signal nodes. ideally, m1, l1 and d1 should be con- nected as closely as possible at the switch node. applicatio n s i n for m atio n wu u u
21 LTC1624 typical applicatio n s u figure 9. LTC1624 layout diagram (see board layout checklist) + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 100pf c c 560pf r c 4.7k d1 mbrs340t3 d2 cmdsh-3 c b 0.1 f 8 7 6 5 1 2 3 4 r2 35.7k 1% r1 11k 1% c out 100 f 10v 2 m1 si4412dy l1* 10 h r sense 0.033 c in 22 f 35v 2 v out 5v 3a v in 5.3v to 28v 1624 f10 *coiltronics ctx10-4 0.1 f figure 10. 5v/3a converter with output derived boost voltage + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 8 7 6 5 1 2 3 4 100pf bold lines indicate high current paths c c r c d1 c b 0.1 f r2 r1 c out m1 l1 + r sense c in v in + v out 1624 f09 +
22 LTC1624 typical applicatio n s u + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 100pf c c 330pf r c 3.3k d1 mbrs130lt3 c b 0.1 f 8 7 6 5 1 2 3 4 r2 35.7k 1% r1 3.92k 1% c out 100 f 16v 2 m1 si4412dy l1* 22 h r sense 0.04 c in 22 f 35v 2 v out 12v 0.75a v in 5.2v to 11v 1624 f13 *sumida cdrh125-220 0.1 f figure 11. wide input range 1.8v/1.5a converter + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 100pf c c 470pf r c 6.8k d1 mbrs140t3 c b 0.1 f 8 7 6 5 1 2 3 4 r2 35.7k 1% r1 3.92k 1% c out 100 f 16v 2 m1 si4412dy l1* 47 h r sense 0.068 c in 22 f 35v 2 v out 12v 1a v in 12.3v to 28v 1624 f12 *sumida cdrh125-470 0.1 f figure 12. 12v/1a low dropout converter figure 13. 12v/0.75a boost converter + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 100pf c c 470pf r c 6.8k d1 mbrs340t3 c b 0.1 f 8 7 6 5 1 2 3 4 r2 35.7k 1% r1 69.8k 1% c out 100 f 10v 2 m1 si6436dy l1* 10 h r sense 0.068 c in 22 f 35v 2 v out 1.8v 1.5a v in 4.8v to 22v 1624 f11 *sumida cdr105b-100 0.1 f
23 LTC1624 typical applicatio n s u + + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 100pf c c 330pf r c 4.7k d1 mbrs130lt3 c b 0.1 f 8 7 6 5 1 2 3 4 r2 35.7k 1% r1 3.92k 1% c out 100 f 16v 2 m1 si4412dy l1a* l1b* r sense 0.068 c in 22 f 35v 22 f 35v v out 12v 0.5a v in 5v to 15v 1624 f14 *coiltronics ctx20-4 0.1 f + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 100pf c c 470pf r c 6.8k d1 mbrs340t3 c b 0.1 f 8 7 6 5 1 2 3 4 r2 35.7k 1% r1 20k 1% c out 100 f 10v 2 m1 si6426dq l1* 20 h r sense 0.068 c in 22 f 35v 2 v out 3.3v 1.5a v in 3.5v to 18v 1624 f16 *coiltronics ctx20-4 0.1 f figure 16. low dropout 3.3v/1.5a converter figure 14. 12v/0.4a sepic converter figure 15. inverting C 5v/2a converter + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 0.1 f 100pf c c 1000pf r c 3.3k r3 100k v cc v cc shutdown d1 mbrs340t3 d2 cmdsh-3 c b 0.1 f 8 7 6 5 1 2 3 4 r2 78.7k 1% r1 24.9k 1% c out 100 f 10v 2 m2 vn2222 m3 tp0610l m1 si4410dy l1* 33 h r sense 0.025 c in 22 f 35v 2 v out 5v 2a v in 5v to 22v 1624 f15 *coilcraft do5022p-333
24 LTC1624 typical applicatio n s u + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 100pf c c 330pf r c 6.8k d1 mbrs130lt3 d2 cmdsh-3 c b 0.1 f 8 7 6 5 1 2 3 4 + r2 35.7k 1% r1 11k 1% c out 100 f 16v 2 m1 si6426dq l1b* l1a* r sense 0.05 c in 22 f 35v 2 22 f 35v v out 5v 1a v out v in 3.6v to 18v 1624 f17 * coiltronics ctx20-4 0.1 f figure 17. 5v/1a sepic converter with output derived boost voltage figure 18. 24v to 12v/10a buck converter with output-derived boost voltage + sense i th /run v fb gnd v in boost tg sw LTC1624 c in1 , c in2 1000 f 35v 2 v in 13v to 28v d1* c b 0.1 f c5 3.3 f 50v c4, 0.1 f 8 7 6 5 1 2 3 4 r sense2 , 0.015 r1 11k 1% r c 20k c c 100pf m1* c out 2700 f 16v r5 220 r2 100k 1% z1 in 755 l1 v out 12v 10a 1624 f18 c in1 , c in2 = sanyo 35mv1000gx c5, c7 = wima mks2 c out = sanyo 16mv2700gx d1 = motorola mbr2535ct l1 = pulse engineering po472 m1 = international rectifier irl3803 r sense1 , r sense2 = irc lr2010-01-r015-f * both d1 and m1 mounted to same thermalloy #6399b heat sink r sense1 , 0.015 + c7 3.3 f 50v c9 0.1 f c10 220pf d2 mbr0540
25 LTC1624 typical applicatio n s u figure 20. 12v to 24v/5a boost converter + sense i th /run v fb gnd v in boost tg sw LTC1624 c3 100pf c4 1500pf c in 100 f 16v v in 9v to 15v v out 24v 5a d1* c b 0.1 f c5 0.1 f 8 7 6 5 1 2 3 4 r2, 1m, 1% r sense 0.005 , 5% r1 52.3k r5 750 0.5w r c 27k c c 4700pf m1* c out1 1000 f 35v + c out2 1000 f 35v z1 in755 7.5v l1 10 h 1624 f20 c in = kemet t495x107m016as c out1 , c out2 = sanyo 35mv 1000gx d1 = motorola mbr2535ct l1 = magnetics core #55930az winding = 8t#14bif m1 = international rectifier irl 3803 r sense = irc oar-3, 0.005 , 5% + *both d1 and q1 mounted on thermalloy model 6399 heat sink + sense i th /run v fb gnd v in boost tg sw LTC1624 c3 100pf c in 22 f 35v v in 20v to 32v d1 c b 0.1 f c5 0.1 f 8 7 6 5 1 2 3 4 r2, 1m, 1% r sense 0.025 r1 13.3k r c 6.8k c c 820pf m1 c out 100 f 100v l1 47 h v out 90v 0.5a 1624 f19 c in = kemet t495x226m035as c out = sanyo 100mv100gx d1 = motorola mbrs1100 l1 = coilcraft d05022p-473 m1 = international rectifier irl 540ns r sense = irc lr2010-01-r025-f + figure 19. 24v to 90v at 0.5a boost converter
26 LTC1624 typical applicatio n s u sense i th /run v fb gnd v in boost tg sw LTC1624 c4 100pf c in1 , c in2 22 f 35v 2 v in 13v to 28v +v in d1 mbrs340 c b 0.1 f c10 0.1 f c11 0.1 f c12 1 f c9 100pf c13 0.1 f +v in c5, 0.1 f 8 7 6 5 1 2 3 4 r sense 0.033 r1 3.92k r6 10k r7 56k r8 1m current adj r2 35.7k r c 10k c c 330pf m1 c out 100 f 16v 2 l1 27 h r4 0.025 v out 12v 3a 1624 f21 c in1 , c in2 = kemet t495x226m035as l1 = sumida cdrh127-270 r sense = irc lr2010-01-r033-f r4 = irc lr2010-01-r025-f m1 = siliconix si4412dy q2 = motorola mmbt a14 c14, 0.01 f + sense i out gnd in ave prog v cc +in 1 2 3 4 8 7 6 5 ltc1620 out nc/adj gnd nc in nc nc shdn 1 2 3 4 8 7 6 5 lt1121-5 + q2 figure 21. 12v/3a adjustable current power supply for battery charger or current source applications
27 LTC1624 typical applicatio n s u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 0996 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** package descriptio n u dimensions in inches (millimeters) unless otherwise noted. s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) figure 22. high current 3.3v/6.5a converter + + sense i th /run v fb gnd v in boost tg sw LTC1624 1000pf 0.1 f 100pf c c 680pf r c 3.3k d1 mbrd835l c b 0.1 f 8 7 6 5 1 2 3 4 r2 35.7k 1% r1 20k 1% c out 100 f 10v 3 m1** l1* 8 h r sense 0.015 c in 22 f 35v 3 v out 3.3v 6.5a v in 4.8v to 28v 1624 f22 * panasonic 12ts-7rolb ** siliconix sud50n03-10
28 LTC1624 1624f lt/tp 0198 4k ? printed in usa ? linear technology corporation 1997 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 l (408) 432-1900 fax: (408) 434-0507 l telex: 499-3977 l www.linear-tech.com typical applicatio n u part number description comments ltc1147 high efficiency step-down controller 100% dc, burst mode operation, 8-pin so and pdip ltc1148hv/ltc1148 high efficiency synchronous step-down controllers 100% dc, burst mode operation, v in < 20v ltc1149 high efficiency synchronous step-down controller 100% dc,std threshold mosfets, v in < 48v ltc1159 high efficiency synchronous step-down controller 100% dc, logic level mosfets, v in < 40v ltc1174 monolithic 0.6a step-down switching regulator 100% dc, burst mode operation, 8-pin so ltc1265 1.2a monolithic high efficiency step-down switching regulator 100% dc, burst mode operation, 14-pin so ltc1266 high efficiency synchronous step-down controller, n-channel drive 100% dc, burst mode operation, v in < 20v lt ? 1375/lt1376 1.5a, 500khz step-down switching regulators high frequency ltc1433/ltc1434 monolithic 0.45a low noise current mode step-down switching regulators 16- and 20-pin narrow ssop ltc1435 high efficiency low noise synchronous step-down controller, burst mode operation, 16-pin narrow so n-channel drive ltc1436/ltc1436-pll high efficiency low noise synchronous step-down controllers, adaptive power tm mode, 20- and 24-pin ssop n-channel drive ltc1474/ltc1475 ultralow quiesent current step-down monolithic switching regulators 100% dc, 8-pin msop, v in < 20v adaptive power is a trademark of linear technology corporation. related parts figure 23. 5v to 3.3v/10a converter (surface mount) + sense i th /run v fb gnd v in boost tg sw LTC1624 d1 10k q2 c b 0.1 f c2 100pf c in 100 f 10v 4 c4, 0.1 f c3, 0.033 f 8 7 6 5 1 2 3 4 r sense 0.0082 r c 6.8k c c 820pf m1 c out 470 f 6.3v 2 l1 1.68 h +v out 3.3v 10a +v in 4.5v to 5.5v v out rtn 1624 f23 c in ( 4) = kemet t495d107m010as c out ( 2) = avx tpsv477m006r0055 d1 = motorola mbrb2515l d2 = motorola mbr0520 l1 = pulse engineering pe53691 m1 = international rectifier irl3803s q2 = motorola mmbta14lt1 r sense = irc oar3-r0082 r3, 10 c8 100pf d2 + r1 20k r2 35.7k

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